deterministic oracle for hardware designs with replayable proofs
deterministic oracle for hardware designs with replayable proofs
Suprastructure is developing a deterministic instrument for verifying structural identity of complex hardware and logic designs. Functional verification is necessary but no longer sufficient: it cannot detect silent architectural drift, supply-chain insertions, or hardware trojans that preserve observable behavior while altering the internal interaction graph. Suprastructure generates partition certificates — mathematically verifiable fingerprints of a design’s interaction graph. How it works: 1. Public seed.h + seed name ("instrumentality") + N=64 instantly builds the exact weighted directed graph W. 2. Our proprietary instrument solves for the canonical hierarchical partition tree T. 3. The result is published as a JSON proof containing T and its canonical SHA-256 hash. Verification (anyone can do this in seconds): Rebuild W from the public GitHub seed ( https://github.com/suprastructural/proof ), walk the published tree to confirm every sup/sub split is admissible, then recompute the SHA-256. It must match the published hash. Finding the correct tree by brute force would take >500 years. Verifying it takes seconds. The free public portal demonstrates this with the synthetic seed above. Production engagements accept real design files (Verilog, SystemVerilog, AIGER, BTOR2, DIMACS, etc.) at any scale. Suprastructure is an early-stage company with patents pending. We are seeking candid feedback from formal verification, hardware security, EDA, and high-assurance engineers. If you have a few minutes, please try the synthetic seed and review the proof. I would greatly appreciate your input on clarity, usefulness for IP handoff / tapeout sign-off / supply-chain assurance, and what is missing. Thank you for your time, consideration and feedback.
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